Recently, a resistance variable memory which uses a variable resistance element as a storage element is focused as a successor of flash memory.
In a memory cell array of a resistance variable memory, memory cells including variable resistance elements are arranged at crossing points between bit lines and word lines. The bit lines and the word lines are arranged on a substrate surface and alternatively laminated, thereby constructing a memory cell array, in which memory cells are three-dimensionally arranged.
In the resistance variable memory, for example, memory cells positioned at crossing points between bit lines and word lines are brought into a low resistance state (set state) by applying a high predetermined voltage to the bit lines in comparison with the word lines. Further, the memory cells in the set state are brought into a high resistance state (reset state) by applying a high predetermined voltage to word lines connected to the memory cells in comparison with bit lines.
In a resistance variable memory, it is difficult to set an optimal reading voltage since a resistance value of a memory cell brought into the set state is changed by various conditions. Specifically, with respect to memory cells brought into the set state, data in the memory cells can be read at a lower voltage than the optimal reading voltage, and power consumption might be increased since a leak current flows from memory cells in a non-selected state.
Therefore, after a set operation is performed, a verification operation is preferably performed to check whether the memory cells are properly set.
However, a method for the verification operation of a resistance variable memory has not been established yet.